WHAT IS POLYN Technology?
the winning blend of academia power of mind and industry expertise

POLYN Technology is a fabless semiconductor company with teams located in Israel, UK, USA, and France.

The Company’s unique NASP technology provides fast and easy conversion of trained Neural Networks into Tiny AI silicon chips with ultra-low power consumption, low latency and small size. NASP is Neuromorphic Analog Signal Processing  of raw sensor data of any type.
NASP can be highly tailored for any specific application and yet affordable for mass market.

…NASP changes the technological paradigm and will seriously impact some markets, making

Analog Neuromorphic computations affordable
Our MIssion

We create the future of neuromorphic technologies 


Our vision is to bring NASP to the semiconductor industry as part of a new generation of signal processing solutions, and to end-users as a viable tool to improve user experience.

NAPS will change applications where it is necessary to have a small, lightweight, power efficient and affordable system with the capability to run a deep neural network in real time

Our Team

of professionals experienced in implementing and commercializing new technologies
Itzhak Edrei
Itzhak Edrei
Board member
Alexander Timofeev
Alexander Timofeev
CEO, Founder
Eugene Zetserov bw
Eugene Zetserov
VP Marketing and BD
val krivenko
Val Krivenko
Director, Co-Founder
Boris Maslov
Boris Maslov
Director, IP, Co-Founder
Dmitry Godovsky
Chief Scientist, Co-Founder
The right team for your project
we love what we do
Work with us
IC Architect


  • Create a requirement specification for a System on a Chip.
  • Create a detailed block-level specification and a top-level representation for a System on a Chip.
  • Identify appropriate external IP blocks to realize the chosen architecture and underline the need in in-house development.

Must-have Qualifications and Experience:

  • 5+ years in digital ASIC or FPGA design
  • Good knowledge of RTL design
  • Good knowledge of typical IP blocks (MCU cores, internal buses, memories, external interfaces)
  • Ability to review work done by external contractors
  • Fluent English

Good-to-have Qualifications and Experience:

  • Low power RTL design knowledge and experience in battery-powered chips’ design
  • Verilog-AMS knowledge and experience in analog-heavy SoC design

Team relations:

This is a technical role, not a managerial one. IC Architect reports to a Project Manager and to COO