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Neuromorphic Computing: A Critical Enabler

Everybody is talking about neuromorphic sensing and computing. Gartner has called neuromorphic computing the first among disruptive technologies that will form the basis of a wide range of future AI-based products. Their comment: “a critical enabler, neuromorphic computing provides a mechanism to model the operation of a biological brain using digital or analog processing techniques.” Gartner mentions early use cases including event detection and pattern recognition, and notes power savings and performance benefits as a prerequisite for breakthrough adoption not achievable with current generations of AI chips.

Thanks to its remarkable energy efficiency, neuromorphic computing holds a big promise for the automation of many aspects of our lives.

A lot has happened since the 1980s when Caltech professor Carver Mead, originator of neuromorphic technologies, described the first analog silicon retina. Today there are many data processing tasks of varying levels of complexity to be addressed with neuromorphic computing, and technologies claiming to be “brain-inspired” are abundant.

Most of them rely on machine-learning methods ranging from simple linear regression models to multilayered deep neural networks and specialized hardware implementations. Some implementations involve assembling artificial neurons transmitting information in a manner similar to biological neurons. This imitates the human brain, which has more than 100 billion neurons and neuromodulators that change their shape in accordance with the performed function.

The closest approach in function to biological neurons pulsing electrically only when a synapse has absorbed enough charge to produce an electrical surge is a spike neural network (SNN), often referred to as the third-generation neural network, which processes signals in the form of spikes. Spikes are short voltage pulses collected and accumulated in a neuron implemented as an integrate-and-fire logic generating an output signal at some threshold.

Spike systems are divided into synchronous and asynchronous signal processing. In a brain, signals propagate asynchronously. Spike systems are best for processing spatio-temporal data such as signals from spike sensors and event cameras. However, the power efficiency of SNN implementation in hardware is limited.

Effective spike processing requires numerous parallel and random accesses to large data memories, especially for the membrane potential of neurons. Sparsity, a key feature of theoretical spike efficiency, turns out to be an issue for practical implementation in current silicon technology. Sparse, event-driven computations mean less and lighter activity with large amounts of idling time. This is a problem for standard CMOS technology, as it seems unavoidable to limit static and idle power consumption to really benefit from the high sparsity of computations in SNNs.  Additionally, in order for a neural network to be implemented in spike hardware, it must be converted to a spike format, which is not always possible.

Another noteworthy neuromorphic approach is in-memory computing, especially that based on memristors (resistors that remember the amount of charge that flowed through). Neural networks are highly constrained by the need to move large amounts of data (weights and input) from/to memory.  In-memory computing seeks to run computer calculations entirely in computer memory, thereby reducing access to memory and data communication.

Memristive devices changing their conductance in response to electrical pulses are promising candidates to act as energy- and space-efficient hardware representation for the brain axons in neuromorphic circuits. They are non-volatile memory retainers without power consumption. Computing-in-memory systems are highly energy efficient and can be used both as coprocessors for digital processors and as standalone systems. They work well for large neural networks, but are not optimal for small ones, and generally impose certain restrictions on the network architecture.

Neuromorphic Analog Signal Processing (NASP) is another remarkable type of neuromorphic technology utilizing analog processing and mimicking human sensory systems. In the human perception of sensory stimuli there are so-called  Markov blanket states of the peripheral cortex (the human retina and ear), which are always on and transfer information to the brain hemispheres for classification.

Blanket states are formed after birth and in early childhood, and do not change during a human’s life; they have a fixed neuron connection structure. The output coming from those blanket states in AI terminology is called ”embeddings”. Embeddings are representations containing densely packed information about sensory input formed by a neural network or biological nervous system. In AI, embeddings are formed in hidden layers of a neural network and contain the most significant information about input data. NASP extracts embeddings from raw sensor data and sends only them for further classification and interpretation.

NASP hardware contains artificial neurons (nodes performing computations)  and axons/synapses (connections with weights between the nodes) implemented using circuitry elements; neurons are implemented using operational amplifiers and connections using thin-film resistors built on top of the analog CMOS circuitry in BEOL. These components comprise NASP fixed neural cores, kind of blanket states, trained to recognize application-specific signal patterns.

NASP design embodies the approach of a sparse neural network, with only the necessary connections between neurons required for inference. The solution reduces the number of neural connections significantly and efficiently. In contrast to in-memory designs, where each neuron is connected to each neighbouring neuron, the NASP approach simplifies the chip layout, saves area, power, design effort and post-silicon cost. This is embodied in analog hardware using the NASP Compiler that transforms any neural network into VLSI design with only necessary neuron connections.

NASP technology has great advantages for implementation of neural networks with one-dimensional input and is optimal for the operation of moderately large networks. For such applications as sensor signal pre-processing and pattern recognition, NASP outperforms SNN and in-memory systems in both power efficiency and time per inference.